Marian Verhelst


Every day, my job allows me to combine top notch research in embedded AI, educating the next generation through teaching, collaborating with industry to make our future better, and inspiring youngsters and girls to help build this future. This constantly enthuses me, and brought wonderful opportunities on my path, from a job at Intel Labs to a professorship at KU Leuven, from a scientific advising role at imec to strategically advising several startups. I love it all! 



Marian Verhelst is a professor at the MICAS laboratories of KU Leuven and a research director at imec. Her research focuses on embedded machine learning, hardware accelerators, HW-algorithm co-design and low-power edge processing. She received a PhD from KU Leuven in 2008, and worked as a research scientist at Intel Labs, Hillsboro OR from 2008 till 2010. Marian is a member of the board of directors of tinyML and active in the TPC’s of DATE, ISSCC, VLSI and ESSCIRC and was the chair of tinyML2021 and TPC co-chair of AICAS2020. Marian is an IEEE SSCS Distinguished Lecturer, was a member of the Young Academy of Belgium, an associate editor for TVLSI, TCAS-II and JSSC and a member of the STEM advisory committee to the Flemish Government. Marian received the laureate prize of the Royal Academy of Belgium in 2016, the 2021 Intel Outstanding Researcher Award, and the André Mischke YAE Prize for Science and Policy in 2021. She is an IEEE fellow and holds 2 ERC grants (ERC Starting Grant Re-Sense, and ongoing ERC Consolidator Grant BINGO).

Marian Verhelst
Marian Verhelst
Academic staff
Ultra-low power digital SoCs and memories
Hardware-efficient AI and ML
+32 16 328617

Current research topics

  • Automated Causal CNN Scheduling Optimizer for Real-Time Edge Accelerators - PHD students: Jun Yin
  • A Scalable Heterogenous Multi-accelerator Platform for AI and ML - PHD students: Ryan Antonio
  • BitWave: Exploiting Column-Based Bit-Level Sparsity for Deep Learning Acceleration - PHD students: Man Shi
  • Uncertainty-Aware Design Space Exploration for AI Accelerators - PHD students: Jiacong Sun
  • Integer GEMM Accelerator for SNAX - PHD students: Xiaoling Yi
  • Improving GPGPU micro architecture for future AI workloads - PHD students: Giuseppe Sarda
  • Scalable large array nanopore readouts for proteomics and next-generation sequencing - PHD students: Sander Crols
  • Hardware-algorithm Co-design and Accelerator Architecture Exploration for hybrid DNN and DSP Workloads - PHD students: Jun Yin
  • Design space exploration of in-memory computing DNN accelerators - PHD students: Pouya Houshmand, Jiacong Sun
  • Multi-core architecture exploration for layer-fused deep learning acceleration - PHD students: Pouya Houshmand, Arne Symons
  • HW-algorithm co-design for Bayesian inference of probabilistic machine learning - PHD students: Shirui Zhao
  • Design space exploration for machine learning acceleration - PHD students: Arne Symons
  • Efficient execution of irregular data flow graphs: Hardware/software co-optimization for probabilistic AI and sparse triangular systems
  • Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories - PHD students: Man Shi
  • Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators - PHD students: Arne Symons
  • Optimized deployment of AI algorithms on rapidly-changing heterogeneous multi-core compute platforms - PHD students: Josse Van Delm
  • High-throughput high-efficiency SRAM for neural networks
  • Ultrasound wave based body area networks
  • Heterogeneous Multi-core System-on-Chips for Ultra Low Power Machine Learning Application at the Edge - PHD students: Pouya Houshmand, Giuseppe Sarda, Ryan Antonio

Career overview

  • 2003: M.Sc. in Electrical Engineering – micro-electronics, KU Leuven, Belgium.
  • 2005 (3 months during Ph.D.): Berkeley Wireless Research Centre (BWRC) at University of California, Berkeley, USA.
  • 2008: Ph.D. KU Leuven
    • Energy-driven, cross-layer design of a low-energy receiver.
  • 2008 - 2011: Wireless Communications Research Lab at Intel Labs, Portland, OR, USA
    • digitally-enhanced analog and RF circuits for performance enhancement, self-test and self-calibration.
  • 2012 - current: Professor at the ESAT-MICAS group of KU Leuven
    • Processor architectures for embedded AI
    • Design space exploration for multi-accelerator platforms
    • Mapping, scheduling and compilation optimization for hardware-efficient AI
  • 2019 - current: Scientific Director at imec



Key publications:

Other publications:

Awards & honors

  • 2023          ERC Consolidator grant BINGO (link)
  • 2023          IEEE fellow
  • 2022          Intel Outstanding Researcher Award (link)
  • 2021          Young Academy of Europe André Mischke Prize for Science & Policy (link)
  • 2021          Selected as “Inspiring Fifty Deeptech 2021 BeNeLux” (link)
  • 2020          Best Long Paper Award at EWV2020
  • 2019          BioCAS Young Researcher Poster Award (Bronze)
  • 2018          Selected as one of the “50 to watch for the Future” by newspaper “De Tijd” (link)
  • 2017          Laureat of the Belgian Academy of Science and Arts (link)
  • 2017          IEEE SSCS BeNeLux Chip Design Contest: 2nd
  • 2016          ERC Starting Grant: Re-SENSE
  • 2015          IEEE SSCS society distinguished lecturer (link)
  • 2015          EOS science communication award
  • 2015          Academy prize for science outreach from the Royal Academy of Belgium
  • 2014          NEWCAS best paper award
  • 2014          IEEE GCCE’14 2nd student paper award
  • 2013          IEEE senior member
  • 2013          Selected member of Young Academy of Belgium
  • 2009          Intel special recognition award for research breakthrough
  • 2008          PhD degree with highest honors (3% top KU Leuven)
  • 2004          Finalist KVIV master thesis award
  • 2003 – 2008 National Science Foundation (FWO) PhD grant
  • 1998          Finalist of the Flemish Mathematics Olympiad


H01L1A  Digitale elektronica en processoren
D0H30A  Elektronische schakelingen, systemen en informatieverwerking
H05D3A  Computer Architectures
H05D5A  Computerarchitecturen
H05H2A  Compute Platforms for AI and Embedded Processing
X0B93A  Digitale elektronica en processoren
H01Q6C  P&O: elektrotechniek
H09L9A  P&D Electronics and Chip Design
HBN76B  Elektronische schakelingen, systemen en informatieverwerking
B3076T  AI in Embedded Systems
H0O38A  Computer Architectures and the HW/SW Interface

Research team