Giuseppe Sarda

Giuseppe loves computer micro-architecture, he remains convinced the details of a sound implementation still make a difference.

He spent several nights debugging RTL, but still remains pationate about building sophisticated, efficient yet simple hardware.

He is also in a complicated love relationship with OOP, expecially C++.

Giuseppe Sarda
Postdoc
Hardware-efficient AI and ML
3270985136
giuseppe.sarda@esat.kuleuven.be
Marian Verhelst
Or meet the full MICAS team

Current research topic

Career overview

Giuseppe Sarda was born in 1995 in Catania, Italy.

He received his Ph.D. in electrical engineering from the KU Leuven in July 2025 with a thesis titled:
"Exploration of Efficiency-flexibility Trade-offs in Computing Systems for Machine Learning".
He received his B.Sc. and M.Sc. in electrical engineering from Politecnico di Torino, respectively, in 2018 and 2020. He completed his Master's Thesis at the Faculty of Informatics of the Technische Universität Wien (TU Wien).

In September 2020, he joined the MICAS group as Research Assistant at Katholieke Universiteit Leuven under Professor Marian Verhelst, where he is still currently working as a full time Researcher.

His current interest are:

  • GPGPU architectures
  • In-Memory computing paradigms

Publications

Cooperative Warp Execution in Tensor Core for RISC-V GPGPU Abubakr Nada, Giuseppe Maria Sarda, and Erwan Lenormand · Conference Proceeding · Jan 1. 2025 2025 IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE, HPCA; 2025; pp. 1422 - 1436
AIMC Modeling and Parameter Tuning for Layer-Wise Optimal Operating Point in DNN Inference Iman Dadras, Giuseppe M Sarda, Nathan Laubeuf, Debjyoti Bhattacharjee, and Arindam Mallik · Article · Jan 1. 2023 IEEE Access; 2023; Vol. 11; pp. 87189 - 87199
Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference Matteo Risso, Alessio Burrello, Giuseppe Maria Sarda, Luca Benini, Enrico Macii, Massimo Poncino, Marian Verhelst, and Daniele Jahier Pagliari · Conference Proceeding · Jan 1. 2023 2023 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, ISLPED; 2023; pp.
HTVM: Efficient Neural Network Deployment On Heterogeneous TinyML Platforms Josse Van Delm, Maarten Vandersteegenl, Alessio Burrello, Giuseppe Maria Sarda, Francesco Conti, Daniele Jahier Pagliari, Luca Benini, and Marian Verhelst · Conference Proceeding · Jan 1. 2023 2023 60TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, DAC; 2023; pp.
Towards the next generation Heterogeneous Multi-core Multi-accelerator Architectures for Machine Learning Vikram Jain, Giuseppe Sarda, Pouya Houshmand, and Marian Verhelst · Other · May 4. 2022
DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC Kodai Ueyoshi, Ioannis A Papistas, Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, man Shi, Qilin Zheng, Sebastian Giraldo, Peter Vranckx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, and Marian Verhelst · Conference Proceeding · Mar 17. 2022 2022 IEEE International Conference on Solid-State Circuits (ISSCC); 2022; Vol. 65; pp.
CoNLoCNN: Exploiting Correlation and Non-Uniform Quantization for Energy-Efficient Low-precision Deep Convolutional Neural Networks Muhammad Abdullah Hanif, Giuseppe Maria Sarda, Alberto Marchisio, Guido Masera, Maurizio Martina, and Muhammad Shafique · Conference Proceeding · Jan 1. 2022 2022 INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS (IJCNN); 2022; pp.

Teaching

Teaching assistant experience
Currently: P&O: Eagle

Previously: Computer Architectures