Arne Symons

  • Machine learning; Deep neural networks
  • Hardware architectures for machine learning acceleration
  • Modelling; Design space exploration; Mapping co-optimisation
Arne Symons
Arne Symons
Phd student
Hardware-efficient AI and ML
+32 16 32 85 65

Current research topic

Career overview

Arne Symons was born in Leuven, Belgium in 1997.

He graduated from KU Leuven, Belgium in 2020 with his Master thesis on "Embedded Learning in Edge Devices towards personalised Voice Command Recognition".

Currently, he works as a research assistant at the MICAS research group under the guidance of prof. Marian Verhelst towards a Ph.D. degree on efficient hardware architectures for deep learning applications. His research focuses on mapping optimisation of deep learning workloads onto specialized multi-core hardware accelerators employing layer-fused processing.

In 2022 he collaborated with researchers at Stanford University in the Robust Systems Group of prof. Subhashish Mitra.

Publications

Stream: Design Space Exploration of Layer-fused DNNs on Heterogeneous Dataflow Accelerators Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, and Marian Verhelst · Article · Jan 1. 2025 IEEE Transactions On Computers; 2025; Vol. 74; iss. 1; pp. 237 - 249
Energy Cost Modelling for Optimizing Large Language Model Inference on Hardware Accelerators Robin Geens, Man Shi, Arne Symons, Chao Fang, and Marian Verhelst · Conference Proceeding · Nov 5. 2024 2024 IEEE 37th International System-on-Chip Conference (SOCC); 2024
Optimizing Layer-Fused Scheduling of Transformer Networks on Multi-accelerator Platforms Steven Colleman, Arne Symons, Victor JB Jung, and Marian Verhelst · Conference Proceeding · Jan 1. 2024 2024 25th International Symposium on Quality Electronic Design (ISQED); 2024
The “Eagle” Approach To Train Electrical Engineers With Collaborative Problem-Solving Skills Fereshteh Poormohammadi, Merijn Van Deyck, Martijn Deckers, Abdul Saboor, Bowen Wang, Pouya Mehrjouseresht, Zhenda Zhang, Arne Symons, Pieter Pas, Alexander Bodard, Hans van Rooij, Marian Verhelst, Alexander Bertrand, Ruth Sabariego, Panagiotis Patrinos, and Peter Coppens · Conference Proceeding · Oct 2. 2023 51st Annual Conference of the European Society for Engineering Education (SEFI); 2023; pp.
DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling Linyan Mei, Koen Goetschalckx, Arne Symons, and Marian Verhelst · Conference Proceeding · Jan 1. 2023 2023 IEEE INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, HPCA; 2023; pp. 570 - 583
Stream: A Modeling Framework for Fine-grained Layer Fusion on Multi-core DNN Accelerators Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, and Marian Verhelst · Conference Proceeding · Jan 1. 2023 2023 IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE, ISPASS; 2023; pp. 355 - 357
Genetic Algorithm-based Framework for Layer-Fused Scheduling of Multiple DNNs on Multi-core Systems Sebastian Karl, Arne Symons, Nael Fasfous, and Marian Verhelst · Conference Proceeding · Jan 1. 2023 2023 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, DATE; 2023; pp.
LOMA: Fast Auto-Scheduling on DNN Accelerators through Loop-Order-based Memory Allocation Arne Symons, Linyan Mei, and Marian Verhelst · Conference Proceeding · Jan 1. 2021 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS); 2021; pp. 1 - 4

Teaching

P&D: Eagle