This project focuses on the monolithic integration of Vertical Hall Sensors (VHSs) within Silicon Carbide (SiC) power modules. The objective is to achieve high-bandwidth, stray-field-immune current sensing for real-time health monitoring. To overcome the bandwidth limitations of traditional spinning current techniques, the research investigates novel digital ripple reduction algorithms, decoupling offset cancellation from readout speed.
SiC transistors require multi-MHz sensing bandwidth to track fast switching transients.
Challenge: Standard chopping/spinning current techniques induce a "ripple" at the chopping frequency. To avoid aliasing, the signal bandwidth is typically capped at a fraction of this frequency.
Goal: Break the bandwidth-accuracy trade-off to capture nanosecond-scale current spikes.
Instead of relying solely on increasing the analog spinning frequency (which hits physical limits), this research proposes Digital Ripple Reduction.
Technique: The system will employ advanced digital signal processing (DSP) to calculate the offset based on the ripple and subtract the offset in the analog domain.
Benefit: This allows the sensor to operate with a lower spinning frequency (reducing power and complexity) while maintaining a clean, high-bandwidth signal path essential for transient analysis.
Application: Utilization of the high-speed, offset-free data to monitor the Safe Operating Area (SOA) in real-time.
Failure Detection: Detection of early degradation signs, such as bond wire lift-off or die-attach fatigue, by analyzing anomalies in the switching current waveforms and ON-resistance.
Bandwidth Unlocked: Achieving current sensing speeds previously unattainable with low-offset Hall sensors.
Compactness: Elimination of bulky external sensors reduces module inductance and size.
Intelligence: Enabling "smart" SiC modules capable of predictive maintenance and self-diagnosis.