RF, mm-wave and THz circuits 
Wireline and Optical Circuits Design of a 135GHz direct-digital 16-QAM wireless and dielectric waveguide link in 28nm CMOS.
As data rates continue to increase, higher capacity communication systems need to be developed. The sub-THz band (100-300GHz) has gained a lot of popularity due the large available bandwidth at such high frequencies. In order to achieve data rates > 30Gb/s, this large bandwidth has to be combined with high-order modulation schemes (such as 16-QAM) to increase the spectral efficiency. Traditional transceiver architectures employ a high-speed, high-resolution digital-to-analog converter (DAC) and analog-to-digital converter (ADC) to perform the high-order modulation and demodulation, respectively. However, as the data rates continue to rise, the power consumption and complexity of these data converters becomes the limiting factor in terms of performance and energy efficiency. In literature, most works ignore these problems and employ external data converters to perform the modulation and demodulation. In order to facilitate future high-speed, energy-efficient communication systems, new architectures need to be considered.
This work implements a 135GHz direct-digital 16-QAM link. The transmitter employs a Cartesian direct-digital modulation architecture capable of generating a low-EVM 16-QAM constellation without relying on high-speed digital-to-analog converters (DACs). The receiver performs on-chip 16-QAM demodulation in the analog domain by means of PAM-4 decoders, obviating the need for high-speed analog-to-digital converters (ADCs). The transmitter and receiver chips were fabricated in 28nm CMOS and were used
to establish both a wireless and a dielectric waveguide (DWG) link via off-chip Vivaldi antennas. A data rate of 32 Gb/s with a 9 pJ/b energy efficiency was achieved over a wireless channel with on-chip 16-QAM modulation and demodulation and without any offline digital signal processing (DSP). Over a DWG channel, a data rate of 24 Gb/s was demonstrated with a link efficiency of 12 pJ/b.
This work presents the first fully integrated 16-QAM link with on-chip modulation and demodulation in the sub-THz frequency range.
D'heer Carl, Reynaert Patrick (Supervision), "A 135 GHz 24 Gb/s Direct-Digital Demodulation 16-QAM Receiver in 28 nm CMOS", in Proceedings of ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference (ESSCIRC), 2022, pp. 485 - 488
D'heer Carl, Reynaert Patrick (Supervision), "A 135 GHz 32 Gb/s Direct-Digital Modulation 16-QAM Transmitter in 28 nm CMOS", in Proceedings of ESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference (ESSCIRC), 2022, pp. 481 - 484
