Sixth generation communication architecture goal is to further improve the end user experience. Pushing physical infrastructure to higher frequencies is a first step to increase channel capacity but also opens to new services such as high-accuracy imaging systems and detectors. For this reasons interest in D-band (110 GHz to 170 GHz) has grown fast in the last few years.
Integrated Power Amplifiers are the bottleneck of transmission chains: their performance dramatically affects signal behavior and transmitter’s power consumption.
These limitations are exacerbated at high frequencies - when operating close to devices’ fmax.
The aim of this research project is the realization of a D-band Power Amplifier exceeding state-of-the-art efficiency performance, especially at backoff power levels. This requirement is crucial to improve transceiver efficiency when high order modulations are used.
As a first approach a class AB power amplifier will be realized in 22nm FD-SOI technology. The amplifier will be then used to implement a backoff efficiency improvement topology.