Wim Dehaene

Current research topics

• Driving large ultrasound transducer arrays for haptic feedback - PHD students: Jonas Pelgrims
• Activity-independent variability resilience for complex ultra-low voltage digital ICs - PHD students: Clara Nieto Taladriz Moreno
• SRAM based digital in memory compute macro in 16nm - PHD students: Weijie Jiang
• Automated in-situ monitoring for variability resilient and energy efficient digital circuits - PHD students: Clara Nieto Taladriz Moreno
• High-throughput high-efficiency SRAM for neural networks
• Ultrasound wave based body area networks
• SRAM Macro Design - PHD students: Bob Vanhoof
• High-resolution neurostimulator ICs for the Visual Cortex - PHD students: Maxime Feyerick

Career overview

• 1991: M.Sc. in Electrical and Mechanical Engineering from the KU Leuven, Belgium.
• 1996: Ph.D. from the KU Leuven on CMOS integrated circuits for analog signal processing in hard disk systems.
• 1996 - 1999: Senior Design Engineer at Alcatel MicroElectronics.
• 1999 - 2001: Program Director of the wireless LAN development program (hardware and software) at Alcatel MicroElectronics.
• 2001 - 2002: Director of the core technology business unit within the wireline division (xDSL) at Alcatel MicroElectronics.
• 2002 - current: Professor at the ESAT-MICAS laboratory of the KU Leuven.

Publications

Key publications:

• Uytterhoeven R., Dehaene W., “Completion Detection-Based Timing Error Detection and Correction in a Near-Threshold RISC-V Microprocessor in FDSOI 28 nm”, IEEE Solid-State Circuits Letters, vol. 3, 2020 
• Baert M., Dehaene W., “A 5GS/s 7.2 ENOB Time-Interleaved VCO-Based ADC Achieving 30.5fJ/conv-step”,  IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), Pages: 328-330, 2019 (IF 4.949)
• Reyserhove H., Dehaene W., “Margin Elimination Through Timing Error Detection in a Near-Threshold Enabled 32-bit Microcontroller in 40-nm CMOS.”, IEEE Journal of Solid-State Circuits,  2018, Volume: 53, Issue: 7, Pages: 2101-2113 (IF 4.929)
• ReyserHove H, Dehaene W., “A Differential Transmission Gate Design Flow for Minimum Energy Sub-10-pJ/Cycle ARM Cortex-M0 MCUs”,IEEE Journal of Solid State Circuits,, Vol 52, no. 7, 2017, pp. 1904-1914. (IF 4.949)
• Reynders N., Dehaene W. “A 210mV 5MHz variation-resilient near-threshold JPEG encoder in 40nm CMOS.” IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), Pages: 456-457, 2014

Other publications

• see our publication database

Awards & honors

Wim Dehaene is co author of more than 10 patents. He (co)supervised 20 PhD in the domain of digital circuit design. He published over 200 conference and journal papers, several book chapters and more than 5 books. Wim Dehaene was a member of the DATE and ISSCC technical program committees. Wim Dehaene organized the ISSCC 2015 and 2016 short course. He is still serving on the technical program committee of ESSCIRC. He will be the technical program chair of ESSCIRC in 2017. For his work in the social, didactical domain he received the senior CERA award in 2010. He was on the short list for the “onderscheiding wetenschapscommunicatie” of the Royal Flemish Academy of science and the arts in 2013. Wim Dehaene is a senior member of the IEEE.

Teaching

• H05H2A Compute Platforms for AI and Embedded Processing
• H09K1A Design of Digital Integrated Circuits
• H09I5A Ontwerp van digitale geïntegreerde schakelingen
• H05D5A Computerarchitecturen
• H03H7A Biomedical Measurements and Stimulation
• H01Z2A Elektrische netwerken
• H06Z7A Biomedische metingen en stimulatie
• H09L9A P&D Electronics and Chip Design
• H09J6A Design of Digital Platforms
• H09I0A Ontwerp van digitale platformen
• H01D2C Informatieoverdracht en -verwerking
• H09M1A Technologie voor de samenleving

Research team

Abdelrahman Fathallah

Technical & support

Bob Vanhoof

Guest researcher

Thomas Genoe

Phd student

Toon Bettens

Phd student

Weijie Jiang

Phd student