> In-situ timing detection
> Ultra-Low Energy Digital CMOS
> Near-threshold CMOS
Clara Nieto Taladriz was born in Madrid, Spain, 1994.
In 2016, she received the B. Sc. degree in electrical engineering from the Universidad Politécnica de Madrid (UPM), Spain.
In 2018, she received the M.Sc. degree in Telecommunication Engineering from the Universidad Politécnica de Madrid (UPM), Spain. She completed the second year of the M.Sc. degree as an exchange student in Katholieke Universiteit Leuven (KU Leuven), Belgium. The subject of her master thesis was: "Towards Efficient and self-sustaining BLE Mesh: Design and Implementation of an Autonomous Network Joining Algorithm".
Later in 2018, she became a KU Leuven Ph.D. student at ESAT-MICAS, under the guidance of Prof. Wim Dehaene, with a research interest in in-situ timing detection strategies for ultra-energy-efficiency and low-voltage digital circuit operation.
