Current research topic
Career overview
Jun Feng was born in Rotterdam, The Netherlands, in 1996.
Jun obtained both BSc and MSc degrees in Electrical Engineering with distinction (cum laude) at Delft University of Technology (TU Delft) in 2017 and 2020, respectively. During his master, he enjoyed a focus on RF and analog/mixed-signal design for microelectronics, and his master thesis was titled "A 10 Gbps Wireline Transceiver Link: To Interface Future RF-DACs".
He joined MICAS as research assistant in September 2020 to pursue the PhD degree and works on high-speed, high-resolution analog-to-digital converters under the guidance of prof. dr. ir. Filip Tavernier.
Publications
Awards & honors
- 2021: ISE President Best Paper Award at ISOCC 2021, for "A Versatile and Efficient 0.1-to-11 Gb/s CML Transmitter in 40-nm CMOS".
- 2022: Analog Devices' Outstanding Student Designer Award, for demonstrating excellence in analog, mixed-signal, digital IC design, or system-level IC architectures.
- 2023: 3rd place in Analog Devices Design Contest 2023, for the design of his latest high-performance SAR ADC.
Teaching
- Teaching assistant for Design of Analog and Mixed-Signal Integrated Circuits (DAMSIC) for 2nd-year master students.
- Supervision of master thesis students:
- Tim Rens: Design of Ring Amplifiers for High-Performance ADCs
- Qilin Zheng: Design of a Voltage-to-Time Converter with a High Linear Range for Time-Based ADCs
- Gilles Belmans: Surpassing ADC Clock Jitter Limitations with Continuous-Time Pipeline ADC
- Tim Borremans: Surpassing Jitter Limitations: Reference Based Jitter Correction
- One more master student is currently being supervised.
