Quantum and cryogenic circuits On 14 September 2015, scientists observed a gravitational wave for the first time, as predicted by Albert Einstein in 1916 based on his theory of general relativity. Such observation opened a new era for astrophysics, in which gravitational waves will probe the universe in a new and complementary way to traditional telescopes. The Einstein Telescope (ET) will be a future third-generation, ground-based gravitational wave detector for extreme sensitivity levels. To suppress any thermal noise source, part of the detector will work at deep cryogenic temperature (20 K and below).
Custom chip design has brought several benefits (power, volume, noise, etc.) to advanced physics experiments, such as the Large Hadron Collider (LHC) at CERN. However, the extremely low temperature represents a non-trivial challenge because many solid-state devices cannot work or show poor functionality under such extreme conditions (e.g., BJTs).
Nanoscale CMOS has been proven to be a valid option for operation at deep cryogenic temperatures and shows some advantages, like a substantial reduction in leakage and a higher transconductance. Among all the technologies capable of operating at extremely low temperatures, only CMOS technology can guarantee the integration of billions of transistors on a single chip with low power consumption and benefit from more than 60 years of innovation and industrial-strength optimization.
However, existing foundry models cannot reproduce the behavior of devices at such low temperatures, thus forcing an intensive use of overdesign and circuit techniques to compensate for the uncertainty and guarantee the circuit's functionality. This inevitably leads to poorly optimized circuits and excessive power consumption, which is highly detrimental to the cooling budget of a cryogenic system.
To enable the design of low-power, optimized custom chips for ET, the first part of this research project focused on the characterization and modeling of commercial components and CMOS technologies at deep cryogenic temperatures. The gathered data was then used to correct the foundry models and develop a modified cryo-PDK.
The second part of the project is exploiting the cryogenic models to design fully optimized, low-noise integrated circuits to be deployed in the cryogenic environment of ET as a part of the mirror vibration control systems (electromechanical and optical) employed to achieve high sensitivity levels.
