Sankhya Bhattacharya

Design for Testability and Chip Reliability

Career overview

2024 - Present: Currently pursuing PhD on " Automated machine-learning-based test generation for analog/mixed-signal integrated circuits" under Prof.Georges Gielen

2018-2024: Worked as Product Development Engineer on ATE based Test Development for FPGA and mixed signal products at Intel Corporation, India. Prior to joining Intel he worked as a Product Test Engineer for Memory solutions at Micron and Qualcomm.

He holds a M.S in System Science from NTHU,Hsinchu,Taiwan and a B.E in Electronics from MAHE,Manipal,India