MOS electron-spin qubits are among the most promising platforms for the realization of a large-scale quantum chip. By their intrinsic nature, they present the best performance at cryogenic temperatures, well below 1 K. This requirement implies the employment of a 3He/4He dilution refrigerator featuring long cooldown times and the need for die packaging, therefore strongly limiting the number of devices that can be measured. In our work, we evaluate traditional transistor metrics to enable wafer-level screening of such devices above cryogenic temperatures, to speed up the technology development. Prior works have not identified a clear link between quantum dot metrics measured at mK and traditional transistor metrics. In this presentation, we show a strong correlation between mK measurements in the few-electron regime and traditional transistor metrics from mK up to 77 K. We investigate the lack of correlation at higher temperatures through TCAD simulations, showing that the main limiting factor is a considerable contribution of the substrate current to the device off current, which prevents the extraction of physically meaningful transistor metrics.
26/4/2024 11:00 - 12:00
ESAT Aula L
