In 2025, we successfully designed HeMAiA, an SoC integrating four heterogeneous accelerators. However, the accelerator configuration is fixed at design time, and the large die area significantly increases backend design complexity. To address this limitation, we ask: can we postpone accelerator selection and instead scale heterogeneity at the assembly phase? The in-development HeMAiA D2D Link explores this new dimension of scalability and heterogeneity. By building a network-on-interposer, we can integrate up to 225 chiplets and enable them to operate as if they were taped out as a single monolithic chip.
16/1/2026 11:00 - 12:00
ESAT Aula C
