State Space Models (SSMs), including recent variants like Mamba, are emerging as strong linear-time contenders to replace transformers in both vision and large language model workloads. Yet their potential is held back by low operational intensity (OI), which keeps current implementations memory-bound and inefficient on GPU-class hardware. This talk shows that the OI bottleneck can in fact be substantially alleviated: by modeling SSM dataflow precisely and applying targeted scheduling and fusion, we expose locality, reduce memory pressure, and unlock the throughput needed for large-scale applications. We then discuss the design of hardware specialized for these optimized dataflows, illustrating the architectural opportunities that arise once SSMs are treated as first-class candidates to replace transformers at scale. By hand-exploring this design space, we show how lifting the OI bottleneck creates clear use cases for custom accelerators and hints that future hardware may evolve in directions fundamentally different from today’s transformer-oriented designs.
28/11/2025 11:00 - 12:00
ESAT Aula L
