The rapid development of quantum technologies is creating the need for qubits that can be produced and tested on a large scale. Silicon spin qubits are especially promising because they are compatible with standard semiconductor manufacturing, but testing them remains slow and expensive. Today, their full characterization requires extremely low temperatures, close to absolute zero, which makes large-scale testing difficult.
This PhD project investigates whether simple electrical measurements performed at room temperature can help predict which devices will work well as quantum dots at cryogenic temperatures. The work focuses on single-electron transistors, or SETs, which are small devices that can behave both as ordinary transistors at room temperature and as quantum-dot devices at very low temperature.
The PhD work shows that specific transistor properties, such as the threshold voltage, subthreshold swing, transconductance, and off-state current, contain useful information about the quality of the electrostatic environment of the device. These metrics can therefore help identify promising devices before performing time-consuming low-temperature measurements. However, the study also shows that this approach only works if the device maintains good electrostatic confinement at room temperature. In the original SET design, this confinement is lost at high temperature because unwanted current paths appear in the substrate.
To understand and solve this problem, the project develops calibrated three-dimensional simulations of the devices. These simulations reproduce the measured electrical behavior and reveal where unwanted currents flow. Based on this insight, a new optimized SET design is proposed. In this new design, the active region is better confined by an extended gate structure, strongly reducing parasitic current paths and improving the room-temperature electrical behavior.
Overall, this PhD project provides a practical route toward faster screening of silicon spin-qubit devices. By combining wafer-scale room-temperature measurements, cryogenic experiments, and simulations, it shows how unsuitable devices can be identified earlier, reducing the need for long and expensive low-temperature testing. This contributes to the broader goal of making silicon-based quantum processors more scalable and manufacturable.
29/6/2026 13:30 - 15:30
ESAT Aula C, B91.300
