To meet the ever present demand for smarter and more intelligent machines, increasing research efforts are focussed on developing novel artificial intelligence (AI) models. However, despite the promising algorithmic properties, many novel models do not compute well on existing hardware architectures like GPU and neural network processors. A salient example of such a class of models is Probabilistic Circuits (PC) used for neuro symbolic AI, which requires sparse and irregular graph based challenging computational patterns. This thesis takes on this challenge by developing a hardware/software co-optimized computation stack, enabling energy constrained edge applications.
https://livestream.kuleuven.be/?pin=704954
26/1/2023 15:30 - 17:30
ESAT Aula R
