A 256-channel stimulator ASIC was fabricated which achieves 11V tolerance with an effective footprint of only 0.0206 mm2/channel. This area is a 3.8x improvement compared to state-of-the-art stimulator designs with similar voltage compliance. At the same time, DTDC keeps the stimulation DC error current below 74 nA, ensuring safe charge-balance simulation. The presented methodology thus bridges the gap between high-channel-count, low voltage stimulators and low-channel-count, high-voltage stimulators, providing the necessary scalability for visual prostheses.
31/8/2026 17:00 - 19:00
ESAT Aula C, B91.300