Artificial Intelligence (AI) has seen remarkable advancements, largely driven by deep learning breakthroughs, making it highly performant and increasingly integrated into various applications. However, the common approach of scaling model sizes with vast amounts of training data is not always feasible, especially for personalized learning on resource-constrained edge devices. Data-efficient deep learning algorithms focus on overcoming the challenge of limited data availability; however, they often do not consider the constraints of limited computational resources.
This research addresses these challenges to enable hardware-efficient and data-efficient deep learning by leveraging block quantization of DNNs across diverse application scenarios, such as image classification and continuous control tasks. Furthermore, the study examines how these algorithms can be effectively implemented using general-purpose and domain-specific vector instruction sets, ensuring efficient execution on modern hardware. Various block configurations are introduced and evaluated for algorithm-hardware co-optimization. By bridging deep learning and hardware optimization, this interdisciplinary work paves the way for smarter, more secure, and high-performance AI, driving the next generation of intelligent applications.
14/3/2025 14:00 - 16:00
Department of Electrical Engineering, Kasteelpark Arenberg 10, 3001 Heverlee, ESAT Aula L
