As technology advances, so do CMOS image sensors capabilities. Smaller pixel sizes and reduced circuit capacitances allow to increase the maximum achievable resolutions and speed of these imagers. However, this also comes with some circuit design challenges: as the amount of data that needs to be converted to digital and taken out of the sensor grows, both the ADC and the output interface become the bottleneck to achieve high resolutions and frame rates.
In this seminar, the data bandwidth limitations of CMOS image sensors will be addressed. A solution will be explored, consisting of performing image compression on the sensor through analog computations.
23/10/2026 11:00 - 12:00
ESAT B91.100
