Event - 30 October 2026

Hardware Generation and Design Space Exploration of Flexible Dataflow Accelerators

Lectured by Xiaoling Yi

What

Rapid advances in artificial intelligence (AI) create diverse computational and memory demands, challenging accelerator designers to balance efficiency, flexibility, and development effort. Flexible dataflow accelerators can adapt to different workloads, but additional flexibility also introduces hardware overhead.

This seminar presents FlexiGen and Proteus-X, two complementary frameworks for designing efficient AI accelerators. FlexiGen automates the generation of complete accelerator systems through a decoupled access-execute architecture. Its reconfigurable compute array and programmable streaming engine support efficient data reuse, dynamic dataflows, and multiple numerical precisions, together with lightweight RISC-V control and software support.

Building on FlexiGen, Proteus-X explores which hardware dataflow combinations and workload mappings best balance latency, energy, and area. Evaluations and case studies demonstrate the optimal flexibile architectures across edge, mobile, and cloud scenarios. The seminar highlights how coordinated hardware generation and design space exploration can identify compact, adaptable architectures suited to diverse AI applications.

When

30/10/2026 11:00 - 12:00

Where

ESAT B91.100