Quantum computers depend on measuring the state of their qubits quickly and reliably. In error-corrected architectures, readout is not a single step at the end of a computation: ancilla qubits are measured in every correction cycle, and readout accounts for a large share of the cycle time. The signals involved are extremely weak, for superconducting qubits a microwave tone of around -120 dBm, and they must be amplified and digitized across a cryogenic chain that spans from millikelvin temperatures to room temperature. Today's experiments rely on racks of room-temperature electronics and dedicated cabling for every readout line. This approach does not scale to the thousands of qubits required for fault-tolerant operation, where wiring heat load, available cooling power and power dissipation per qubit become the limiting factors.
This seminar reviews the main qubit readout techniques, from dispersive readout of superconducting qubits to RF reflectometry of spin qubits and translates their requirements into circuit specifications. It follows the readout chain from parametric amplifiers through cryogenic low-noise amplifiers to the digitizer, and highlights where the scaling bottlenecks arise. It then compares the options for placing the readout electronics, at room temperature, in cryo-CMOS or in superconducting logic, and discusses ongoing work on a cryogenic bandpass delta-sigma converter that digitizes the readout signal directly at 4 K, without a separate downconversion stage.
15/1/2027 11:00 - 12:00
ESAT B91.100
